Distributed systems require robust node to node data transfer. FPGA’s are particularly suited for this work since they support high speed I/O. However, scope creep on the role of the FPGA in the system can result in extensive maintenance burdens for a team with regular turnover. In general, there are different kinds of firmware developers and the VHDL/verilog type seem to be more difficult to obtain… although the majority of the challenge is simply finding strong willpower and initiative to solve unfamiliar problems. Problems you already know how to solve are boring!

Anyway, a buffer or line driver to interface the logic to the physical world is desirable. For example, microchip offers the SY58600 and similar IC’s.

You got it, just a buffer logically speaking and therefore to a firmware person it is a non entity. Totally transparent. To a hardware person, the regular design tradeoffs apply. Switching characteristics, size, power consumption, cost etc. The cost of this thing is incredible, so maybe there’s a lesser variant if your switching speeds are lower. Up to 7 GHz is a lot.

So what logic might we choose to hook up and drive / receive signals? An interesting choice is the Titanium Ti35 from Efinix. At 5.5mm squared, a small and capable FPGA can provide all the serialization and deserialization, and synchronous logic needs required for most systems. Once signals are onboard, something like SPI would be fine to get data into a C environment. If real time is critical, RTOS and some synchronization help from the FPGA may be in order. But there is ample room for solutions in this FPGA, and the density appears superior from a brief comparison.

One problem is that there is no dev kit for this device readily available at the time of writing, and also nothing on shelves so far as I can see on Octopart / Digikey. These low end FPGA’s seem very competitive in cost and availability and I hope to see more interesting projects make use of them. It seems there is integrated flash memory to hold the bitstream as well! Save your board space on the CFG EEPROM, amazing.

At only 100 balls, the schematic and layout work should be in reach for hobbyists. Cost is currently unknown.

Maybe as a personal project I could create a dev kit for such applications. It would be a great learning experience. Combine with a convenient wireless friend like the STM32WB55RG and you could have a great platform for wireless bootloading, debugging etc. I’m sure interfacing between them at reasonably high speeds is achievable, although I don’t see dedicated SPI stuff in the FPGA, apart from the CFG pins. Maybe those can be repurposed on the fly, or the MUX to flash vs CRAM is in FPGA logic in the controller already.

Edit: There are buffers / repeaters with equalization. These kinds of IC’s are often categorized strangely. The electrical signal is one thing, and the marketing and application notes for the IC is another. For example, over at Digikey one can find PECL interfaces in the “Signal Buffers, Repeaters, Splitters” category or the “Drivers, Receivers, Transceivers” category. At least they do all fall correctly under “ICs -> Interface”. But within this category, I’ve found rather similar ICs in three different categories. It makes the parametric search tricky.

I have worked on a very large system integrated from many parts of late, namely towed array sonar. Part of the challenge of working on a large, complex system is the lead time of individuals who will digest and synthesize all the information required to develop a working mental image of the system.

To mitigate this, I think there is potential in the concept of zoomable user interface, or ZUI. In a ZUI, details are rendered the further you zoom in. The fascinating program treesheets implements this to an extent:

Go try it out: https://strlen.com/treesheets/

This is a great program. The ability to invert a hierarchy seems particularly clever. However, the learning curve is steep and entering a state of flow, efficiently organizing your thoughts in this sandbox takes a certain something.

Another example is here: https://josephernest.github.io/bigpicture.js/index.html

This example provides more clarity on why a ZUI is useful. Because a user inspecting the high level is shielded from detail, but can traverse a structure. This is the mode of a new manager or director approaching a complex product. They don’t need -all- the details, in fact many discussions end up taking longer than they need to because us bottom level engineers have something to prove and needlessly chatter about the complexities of development.

Again, try it out so you can see what I mean.

So, a ZUI is conceptually a human to information interface that can help the human navigate complexity by organizing detail hierarchically. If you are a niche developer, you would live in one small corner and live and breathe the finer details, perhaps never really grasping the function of the system as a whole. That’s okay too, in fact most complex systems should nominally remove the need for someone to understand the whole thing through strict partitioning and interface design.

Take it to the next level, and perhaps one could have a ZUI in VR and swipe around a design like Tony Stark.

Moving memory around is often more important than instruction execution speed. It can also be more difficult. This is extremely true in distributed embedded systems, where a number of nodes make up a system with some objective. The problem becomes even more interesting if the arrival and departure time of said memory is constrained in time. LL has a fascinating paper concerning the management of clocks and the ordering of events.

A recently posted article on Hacker News discusses the DMA controllers available on the RP2040. Some STM32 devices also feature DMA controllers. The speed and usability of these cores, and the speed of the memory can be important to the system design.

These are an important feature to know about and make use of if real-time operation of your main processor cores can impact the greater system.

The presence of the PIO controllers on the RP2040 is another powerful addition. These features bring embedded microprocessors closer to their FPGA counterparts.